Staff Digital Design Engineers
NXP Semiconductors · Pune District
- Experience5–6 yrs
- SalaryNot disclosed
- RoleVLSI Engineer
- Work modeonsite
- Posted14 Oct 2026
About NXP Semiconductors
NXP Semiconductors is hiring in Pune District in semiconductors electronics. This role looks for around 5+ years of experience.
Skills
- Verilog
- SystemVerilog
- MCU/MPU architecture
- AMBA protocols
- Clock-domain crossing
- Low-power design methodologies
- Synthesis
- Static timing analysis
- FPGA prototyping
- Emulation
- Linux
- Python
- Perl
- Tcl
- Machine Learning
The role
Digital design engineer at a company developing MCU and embedded processing platforms. Develops digital modules and microarchitectures, integrates IP, and optimizes synthesizable RTL for power, performance, and area using Verilog/SystemVerilog and MCU/MPU architecture. Applies AI/ML concepts and scripting in Python.
Full job description
Summary:
We are seeking an innovative and highly motivated Digital Design Engineer to develop next-generation MCU and embedded processing platforms while leveraging AI/ML technologies to transform silicon development workflows. The candidate will contribute to RTL design, microarchitecture development, IP integration, and design optimization while utilizing AI-assisted methodologies to improve quality, productivity, power, performance, and area (PPA).This role combines traditional digital design expertise with emerging AI/ML-driven design automation, intelligent debug, design space exploration, and agentic engineering workflows.
Job responsibilities:
Digital Design & MCU DevelopmentArchitect and develop digital modules for MCU and embedded processor subsystems.Define microarchitecture specifications based on product requirements.Develop synthesizable RTL using Verilog/System Verilog.Perform IP integration and subsystem assembly.Collaborate with architecture, verification, DFT, firmware, and validation teams.Support FPGA prototyping, emulation, and silicon bring-up activities.Analyze timing, power, area, and performance tradeoffs.
Job Qualifications:
B.E./B.Tech./M.E./M.Tech. in Electrical/Electronics or Computer Science Engineering5+ years of experience with Strong digital design fundamentals.RTL design using Verilog/SystemVerilog.MCU/MPU architecture understanding.AMBA protocols (AXI, AHB, APB).Clock-domain crossing and reset architectures.Low-power design methodologies.Synthesis and static timing analysis.FPGA prototyping and emulation.Linux development environment.Scripting in Python, Perl, or Tcl.AI/ML Skills, practical understanding of Machine Learning concepts.
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