STA Engineer - EDA/CAD Flow : Software Development Engineer

AMD · Hyderabad

  • Experience2–3 yrs
  • SalaryNot disclosed
  • RoleVLSI Engineer
  • Work modeonsite
  • Posted13 Oct 2026
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About AMD

AMD is hiring in Hyderabad in semiconductors electronics. This role looks for around 2+ years of experience.

Skills

  • RTL design
  • Verilog
  • VHDL
  • Static Timing Analysis
  • Timing analysis
  • Digital design
  • Place and route
  • Timing closure

The role

STA engineer at a semiconductor technology company. Applies digital design and Static Timing Analysis to create complex designs, debug place-and-route issues, and achieve timing closure using RTL design, Verilog/VHDL, and timing analysis. Uses TCL and EDA tools to support design flows.

Full job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.

Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career.

STA Engineer - EDA/CAD Flow : Software Development Engineer

The Role

We are looking for a dynamic, upbeat software engineer to join our growing team. As a key contributor you will be part of a leading team to drive and enhance AMD’s abilities to deliver the highest quality, industry-leading technologies to market.

The Person

The ideal candidate should have a strong background in RTL design using Verilog/VHDL and strong exposure to timing closure concepts with foundations in timing analysis & digital design.

Key Responsibilities

The candidate should have a solid understanding of

RTL coding stylesSTA and Timing Constraint ConceptsPlace and route algoritms and applications. The candidate will be responsible for creating complex designs, debugging P & R issues and will work to achieve timing closure.

Preferred Experience

Scripting language such as TCL, Perl or PythonEDA tools and flowFamiliarity with Linux and modern software tools and techniques for developmentGood analytical and problem-solving skills

Academic Credentials

BS or MS in EE or CE with 2-3 years of experience in Digital Design and Static Timing Analysis

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.