Sr RTL Silicon Design & Validation Engineer
Advanced Micro Devices (AMD) · Hyderabad
- Experience8–13 yrs
- SalaryNot disclosed
- Work modeonsite
- Levelexecutive
- Posted10 Sept 2026
About Advanced Micro Devices (AMD)
Advanced Micro Devices (AMD) is hiring in Hyderabad in semiconductors electronics. This role looks for around 8+ years of experience.
Skills
- PCIe
- CXL
- RTL coding
- Verilog
- SystemVerilog
- VCS
- ModelSim
- NVMe
- Ethernet
- DDR
- LPDDR
- HBM
- AMBA AXI/AHB/APB
- Tcl
- Perl
- Python
- Unix shells
- Makefiles
- FPGA
- IP/SoC design methodologies
The role
A silicon design and validation engineer at a semiconductor technology company develops PCIe connectivity solutions using RTL coding and verifies high-speed interfaces. The role applies SystemVerilog and FPGA prototyping across pre-silicon and post-silicon validation.
Full job description
Senior RTL Silicon Design Validation Engineer
As a member of the AECG Product Validation and Solutions Team within AMD you will develop and enable the next generation of PCIe technologies to power datacenter, acceleration, AI and communications markets. High speed PCIe connectivity is critical for modern technology and infrastructure that helps improve our lives.
Job Summary
The Role
At AMD you will help create leading edge PCIe technologies used in a wide variety of applications. The focus of this role is to design, plan and execute RTL design for new and existing PCIe technology and solutions for programmable silicon at AMD. Key development includes PCIe technologies for PCIe Gen6/Gen7, CXL, TDISP, IDE, PCIe in-line DMA and other leading edge products.
The Person
You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. You should also have a desire to expand existing skill sets and take on new challenges.
Key Responsibilities
Develop and productize next generation PCIe, CXL and connectivity solutions to power datacenter, acceleration, AI and communications markets
Participate in technical role in all phases of the product development cycle from new product exploration, architecture through implementation, prototyping, validation, productization and support including but not limited to architecture, design, and documentation for IPs
Develop comprehensive testing plans including Compliance and Interop testing. Critically review and provide feedback on the Design Implementations and Verification plans
Pre-Silicon and Post Silicon validation for new PCIe enabled blocks
Responsible for IP design, Silicon bring up, Validation and IP release
Work in collaboration with the Global teams
Preferred Experience
Strong knowledge in RTL coding, preferably with Verilog and SystemVerilog
Proficient in RTL simulation tools (VCS, Modelsim)
Knowledge of high-speed interfaces including, PCIe, CXL, NVMe, Ethernet, DDR, LPDDR, HBM, AMBA AXI/AHB/APB protocol
Experience in using Lab equipment like PCIe Lecroy/Viavi Exerciser/Analyzer
Experience in developing system or IP prototypes using FPGAs
Strong knowledge of IP/SOC design methodologies
Experience with scripting languages including Tcl, Perl, Python, Unix shells and Makefiles
Knowledge of C/C++ is an added advantage
Academic Credentials
Bachelors or Masters degree in computer engineering/Electrical Engineering with 8+Yrs of exp
Disclaimer: This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.