GPU Physical Design Engineer
Imagination Technologies · Hyderabad
- Experience2–5 yrs
- SalaryNot disclosed
- Work modeonsite
- Levelmid
- Posted21 Sept 2026
About Imagination Technologies
Imagination Technologies is hiring in Hyderabad in semiconductors electronics. This role looks for around 2+ years of experience.
Skills
- GPU architecture
- synthesis
- physical design
- Place-and-Route
- RTL to GDS flow
- Static Timing Analysis
- PPA analysis
- Tcl
- Python
- shell scripting
The role
A physical design engineer at a semiconductor IP company implements GPU IP for SoCs, optimizing synthesis and physical design while applying Static Timing Analysis. The role also uses Tcl, Python, and shell scripting to automate design flows and improve PPA.
Full job description
The role
This is a unique opportunity to leverage your Silicon design skills and be at the forefront of engineering excellence and innovation. You will work with some of the world’s most advanced SOC design teams and play a pivotal role in supporting leading customers to seamlessly implement our GPU IP into their design.
You will collaborate closely with our design, pre-sales, and PPA (Power, Performance, Area) teams to provide invaluable feedback and contributions that will influence the future direction of our IP.
Your work will directly impact high-profile projects and help advance cutting-edge technology.
You will:
Implement and optimize complex GPU IP blocks using industry-standard synthesis and PnR tools.Debug physical design issues including timing, area, placement and routing challenges.Work with experienced engineers and engage with customers to support the successful physical implementation of our GPU IP within their SoCs.Collaborate with RTL design, PPA and other engineering teams to identify and improve the physical characteristics of our IP.Perform analysis and clearly communicate findings, trade-offs and recommendations.Contribute to the development and improvement of synthesis, PnR and analysis flows.Use scripting and automation to improve engineering productivity and design quality.Participate in technical discussions, design reviews and knowledge-sharing sessions.Develop your understanding of GPU architecture and how architectural and RTL decisions affect physical implementation and PPA.Explore new EDA methodologies, automation and AI-assisted techniques that can improve physical design productivity.
About You
Committed to making your customers, stakeholders and colleagues successful, you’re an excellent communicator, listener and collaborator who builds trusted partnerships by delivering what you say, when you say. You’re curious, solutions orientated and a world-class problem solver who constantly seeks opportunities to innovate and achieve the best possible outcome to the highest imaginable standard.
You are an engineer who enjoys a holistic understanding of a design and why it behaves the way it does, rather than simply running the flow. You are curious, analytical, and comfortable investigating difficult technical problems. You communicate clearly, work well with engineers from different disciplines, and take ownership of your work while seeking guidance when appropriate.
You are keen to deepen both your physical design expertise and your understanding of the architecture behind the hardware you implement.
You'll have:
Hands-on experience with industry-standard PnR tools such as Cadence Innovus or Synopsys Fusion Compiler.Experience with synthesis using tools such as Cadence Genus, Synopsys Design Compiler or Fusion Compiler.Good understanding of the RTL to GDS flow, including synthesis, floorplanning, placement, clock tree synthesis, routing and timing closure.Understanding of Static Timing Analysis and fundamental timing concepts.Experience analysing and improving PPA.Good problem-solving and debugging skills.Basic scripting experience using Tcl, Python and/or shell scripting.Good written and verbal communication skills.
You might also have:
Experience or exposure to GPU, AI accelerator or other high-performance SoC designs.Experience with advanced semiconductor process nodes such as 5nm, 3nm or below.Exposure to tape-out and sign-off activities.Experience with STA tools such as Synopsys PrimeTime or Cadence Tempus.Knowledge of hierarchical synthesis and physical design methodologies.Experience with low-power implementation techniques.Familiarity with physical verification, IR drop, electromigration or power integrity analysis.Understanding of DFT methodologies such as scan compression and MBIST.Knowledge of Verilog/SystemVerilog and the ability to understand RTL from a physical implementation perspective.Experience developing or improving physical design flows and automation.
Who We Are
Imagination is a UK-based company that creates silicon and software IP designed to give its customers an edge in competitive global technology markets. Its GPU and AI technologies enable outstanding power, performance, and area (PPA), fast time-to-market, and lower total cost of ownership. Products based on Imagination IP are used by billions of people across the globe in their smartphones, cars, homes, and workplaces.
We need your skills to help us continue to deliver technology that will impress the industry and our customers alike, ensuring that people everywhere can enjoy smarter and faster tech than ever before.
So come join us if you're wanting that something more
Bring your talent, curiosity and expertise and we’ll help you do the rest. You’ll be part of one of the world’s most exciting companies who are one of the leaders in semiconductor IP solutions.
As a part of our team, you can help us transform, innovate, and inspire the lives of millions through our technology.
Additional Information
If you encounter accessibility barriers in the application process or if you have access needs and require support or adjustments to participate equitably in the recruitment process, please email recruitment@imgtec.com.