Senior RTL Design Engineer

Qualcomm · Delhi

  • Experience3–5 yrs
  • SalaryNot disclosed
  • Work modeonsite
  • Posted23 Sept 2026

About Qualcomm

Qualcomm is hiring in Delhi in semiconductors electronics. This role looks for around 3+ years of experience.

Skills

  • Digital IP architecture
  • SoC microarchitecture
  • Clock and reset design
  • AHB
  • AXI
  • SoC integration
  • PLDRC
  • Clock-domain crossing

The role

A digital design engineer at a semiconductor product company designs SoC microarchitecture and integrates RTL using interconnect bus protocols, clock and reset design, and clock-domain crossing techniques. The work also applies digital IP architecture and SoC integration practices to build electronic systems.

Full job description

Job Summary

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications

Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

Responsibilities

RTL Design engineer

3-5 yrs

Digital IP architecture, SOC Microarchitecture, Clock, reset

Interconnect Bus protocols - AHB, AXI

SoC integration, PLDRC, CDC

Experienced with large scale SoCs integration aspects