Senior Lead STA Engineer
Qualcomm · Delhi
- Experience5–10 yrs
- SalaryNot disclosed
- Work modeonsite
- Posted23 Sept 2026
About Qualcomm
Qualcomm is hiring in Delhi in semiconductors electronics. This role looks for around 5+ years of experience.
Skills
- static timing analysis
- Tweaker
- Tempus
- Physical PT ECOs
- power optimization
The role
A design verification engineer in a semiconductor company develops Design Verification Engineer (VLSI) solutions for static timing analysis, engineering ECOs with Tweaker, Tempus, and Physical PT ECOs, and reducing power through deep submicron process technology.
Full job description
Solid grip on STA fixing aspects to solve extreme critical timing bottleneck paths. . Should be aware about preparing complex ECOs for timing convergence [ across huge set of corners] through Tweaker / Tempus / Physical PT ECOs. . Should be aware about the tricks for minimizing power.
Experience in deep submicron process technology nodes is strongly preferred.