Senior Lead DSP Implementation Engineer

Qualcomm · Delhi

  • Experience5–8 yrs
  • SalaryNot disclosed
  • Work modeonsite
  • Posted23 Sept 2026
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About Qualcomm

Qualcomm is hiring in Delhi in semiconductors electronics. This role looks for around 5+ years of experience.

Skills

  • timing closure
  • MCMM synthesis
  • optimization
  • UPF
  • timing constraints
  • static timing analysis
  • pipelining

The role

A DSP implementation engineer at a semiconductor company designs multi-clock domain timing closure using MCMM synthesis, optimization, and UPF low-power implementation. The role applies static timing analysis and pipelining for performance optimization.

Full job description

Experience in all aspects of timing closure for multi-clock domain designs. . Should be familiar with MCMM synthesis and optimization. . Should have good understanding of low-power design implementation using UPF.

Experience with writing timing constraints for synthesis,STA,timing closure and pipelining at different levels for performance optimization and timing closure.