DFT Engineer
Qualcomm · Delhi
- Experience2–7 yrs
- SalaryNot disclosed
- Work modeonsite
- Posted23 Sept 2026
About Qualcomm
Qualcomm is hiring in Delhi in semiconductors electronics. This role looks for around 2+ years of experience.
Skills
- ASIC design-for-test
- scan insertion
- ATPG
- coverage analysis
- transition delay testing
- test vector simulation
- Engineering
The role
A design verification engineer in a semiconductor product company performs ASIC design-for-test work using scan insertion, ATPG, and coverage analysis, and simulates test vectors. The role also applies transition delay testing and engineering fundamentals.
Full job description
Minimum Qualifications . Bachelors degree in Science,Engineering,or related field. . 2+ years experience in the area of ASIC / DFT.
Excellent communication and team work skills and good English is required
In depth knowledge and hands on experience in scan insertion,ATPG,coverage analysis,Transition delay test coverage analysis.
Experience in simulating test vectors.