Design Engineer, Senior Staff/Manager
Qualcomm · Delhi
- Experience12–13 yrs
- SalaryNot disclosed
- RoleElectronics Hardware Engineer
- Work modeonsite
- Posted13 Oct 2026
About Qualcomm
Qualcomm is hiring in Delhi in semiconductors electronics. This role looks for around 12+ years of experience.
Skills
- ASIC design
- RTL design
- Digital IP architecture
- SoC microarchitecture
- AHB
- AXI
- SoC integration
- PLDRC
- CDC
The role
ASIC design engineer at a semiconductor technology company. Defines and designs digital IP and SoC microarchitecture, integrating large-scale SoCs with AHB and AXI interconnect protocols. Applies clock and reset design, PLDRC, and CDC.
Full job description
Company
Qualcomm India Private Limited
Job Area
Engineering Group, Engineering Group > ASICS Engineering
General Summary
As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers collaborate with cross-functional groups to determine product execution path.
Minimum Qualifications
Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
RTL Design engineer
12+ yrs
Digital IP architecture, SOC Microarchitecture, Clock, reset
Interconnect Bus protocols - AHB, AXI
SoC integration, PLDRC, CDC
Experienced with large scale SoCs integration aspects
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