Staff, VLSI Design Engineering (Verification) with 8-12 years of experience

Sandisk · Bengaluru

  • Experience8–12 yrs
  • SalaryNot disclosed
  • Work modeonsite
  • Levelexecutive
  • Posted18 Sept 2026

About Sandisk

Sandisk is hiring in Bengaluru in semiconductors electronics. This role looks for around 8+ years of experience.

Skills

  • UVM
  • C
  • Verilog
  • SystemVerilog
  • Xcelium
  • Verdi
  • JasperGold
  • SystemVerilog Assertions
  • verification automation

The role

A VLSI design verification engineer at a semiconductor memory company develops UVM environments and validates complex SoC designs through SystemVerilog Assertions and formal verification. C, Verilog, and verification automation support reusable testbenches, coverage closure, debugging, and silicon-quality outcomes.

Full job description

Company Description

Sandiskunderstands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape.

Sandiskmeets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibilityforward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globallyforinnovation, performance and quality.

Sandiskhas two facilities recognized by the World EconomicForum as part of the Global Lighthouse Networkforadvanced 4IR innovations. These facilities were also recognized as Sustainability Lighthousesforbreakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world movingforward.

Job Description

We are seeking an experienced Principal Engineer, VLSI Design Engineering to lead verification efforts for complex IP blocks and fullchip designs. In this role, you will drive functional verification closure, mentor engineering teams, and collaborate across multiple disciplines to ensure design quality and silicon success.

Key Responsibilities

Lead the development and execution of comprehensive test plans, verification strategies, and verification infrastructure for complex IP blocks, sub-systems, and SoC designsDesign and implement verification environments using industry-standard UVM (Universal Verification Methodology) frameworksDevelop reusable and scalable verification components, including bus functional models, monitors, checkers, and scoreboardsDrive functional coverage-driven verification closure and ensure comprehensive design validationDevelop and maintain System Verilog Assertions (SVA) for design verification, including coding, porting, and maintenance activitiesCollaborate with design architects, RTL designers, and post-silicon validation teams to ensure seamless verification integrationCreate and optimize verification automation tools and scripts to enhance design and verification productivityInvestigate, debug, and perform root-cause analysis of design failures through cross-functional team collaborationMentor junior engineers and contribute to the continuous improvement of verification methodologies and best practices

Qualifications

Required Qualifications:

8 to 12years of relevant experience in VLSI design verificationBachelor's degree in Electronics and Communication Engineering (ECE), VLSI, or Electrical Engineering; Master's degree preferredAdvanced proficiency in C, Verilog, System Verilog, and UVM (Universal Verification Methodology)Hands-on experience with industry-standard verification tools including Xcellium, Verdi, and JasperGold formal verification toolsDemonstrated expertise across the complete verification lifecycle, including planning, testbench development, test case development, regression management, coverage analysis, debugging, and sign-offProven ability to lead technical projects and manage stakeholder relationships effectivelyBring in AI/ML/Automation based initiativesWillingness to learn new tools and related methodologiesExcellent written and verbal communication skills with demonstrated ability to adapt to dynamic project requirements and deliver results under challenging schedules

Preferred Qualifications

Experience with NAND flash memory protocols and memory design verificationTrack record of mentoring junior engineers and contributing to process improvementsExperience with formal verification methodologies and assertion-based verification

Additional Information

Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution.

Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us atjobs.accommodations@sandisk.comto advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying.