Staff Analog layout Engineer
onsemi · Bengaluru
- Experience6–7 yrs
- SalaryNot disclosed
- Work modeonsite
- Levelsenior
- Posted15 Sept 2026
About onsemi
onsemi is hiring in Bengaluru in semiconductors electronics. This role looks for around 6+ years of experience.
Skills
- Analog Layout Design
- Deep-Submicron CMOS
- BCD Technology
- Cadence Design Environment
- Calibre DRC
- Calibre ERC
- Calibre LVS
- Unix
The role
An analog layout engineer in semiconductor manufacturing develops power-management chip layouts for deep-submicron CMOS and BCD technologies. They produce complex AMS IP layouts, optimize floor planning and power routing, perform Cadence physical verification, and automate layout workflows with SKILL. Their skills include analog layout design, Cadence physical verification, SKILL, Perl, Python, semiconductor manufacturing, design-for-manufacturing techniques, and Unix.
Full job description
Job Description
OnSemi is seeking a Staff Analog layout Engineer, NEW PRODUCT DEVELOPMENT, Power Management, to join our growing team in Bengaluru, India. This group is responsible for development of Power management products including DC-DC PMIC/POL, Multiphase controllers, Dr. MOS, AC-DC converters, LED drivers, SiC drivers, Switches and e-fuses for consumer, industrial and automotive applications. In this role, you will focus on the following.
Responsibilities
Produce high quality layout for complex AMS IP blocks (voltage regulators, bandgap, current sense-amp, amplifier, high voltage switches, drivers etc)
Contribute to area estimation and optimization, floor planning, power routing, shielding, physical verification (DRC, ERC, LVS, ESD, etc.), as well power analysis (EM / IR-Drop) Contribute and support team in taping out high-performance microcontroller chip Actively seek out opportunities to work with cross-functional teams (Chip team, Tech, CAD) Develop scripts and methods for layout design automation
Qualifications
BE in Electrical Engineering or related + 7 years of experience, or MS +6 years of experience preferred with experience in analog/mixed-signal layout design of deep submicron CMOS and BCD technologies
Qualification
Experience in delivering high quality analog layout IPs Good understanding of layout fundamentals and best practices Proficiency in interpretation of CALIBRE DRC, ERC, LVS, reports Programming knowledge in SKILL, Perl, and/or Python is a bonus Experience with CADENCE or MENTOR GRAPHICS layout tools Solid understanding of semiconductor manufacturing process and DFM techniques Proficient at debugging/fixing LVS/DRC errors Must be familiar with Cadence Design Environment (CDE) and Unix OS Must have strong communication skills and be a team player
About Us
onsemi (Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world’s most complex challenges and leads the way in creating a safer, cleaner, and smarter world.
More details about our company benefits can be found here:
https://www.onsemi.com/careers/career-benefits
About The Team
We are committed to sourcing, attracting, and hiring high-performance innovators, while providing all candidates a positive recruitment experience that builds our brand as a great place to work.