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Silicon DFT Engineer at Google — Bengaluru

Experience2–3 yrs
SalaryNot disclosed
Work modeonsite
Levelmid
Posted14 Sept 2026

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About Google

Google is hiring in Bengaluru in technology software. This role looks for around 2+ years of experience.

Skills

analog or mixed-signal Integrated Circuit design
system-on-chip design and integration
design automation
Design for Testability
Scan
Automatic Test Pattern Generation
Memory Built-In Self-Test
ASIC DFT synthesis
Static Timing Analysis
simulation
verification
Register-Transfer Level
netlist design
Lint
Clock Domain Crossing

The role

A silicon DFT engineer at a technology product company designs and verifies ASIC test architecture using Design for Testability, Scan, and Automatic Test Pattern Generation, supporting SoC integration and silicon bring-up. The role also applies Static Timing Analysis and memory Built-In Self-Test across RTL and netlist flows.

Full job description

In most instances, this position requires in-person interviews as part of the hiring process.Minimum qualifications:

Bachelor's degree in Electrical Engineering or a related field, or equivalent practical experience.2 years of experience with analog or mixed-signal Integrated Circuit (IC) design.Experience with system-on-chip design/integration flow, and design automation.Experience with Design for Test (DFT) technologies such as Scan, Algorithmic Test Pattern Generation (ATPG) and Memory Built in Self Test (MBIST). Experience with Application-Specific Integrated Circuit (ASIC) DFT synthesis, STA, simulation, and verification flow.

Preferred qualifications:

Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science or a related field.Experience working with Automatic Test Equipment (ATE) engineers (e.g., silicon bring-up, patterns generation, debug, validation on automatic test equipment, and debug of silicon issues, etc.).Experience in System on a Chip (SoC) cycles, including silicon bring-up and silicon debug activities.Experience in fault modeling.

About the jobBe part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.

Responsibilities

Document Design for Testability (DFT) architecture and test sequences, including boot-up sequence associated with test pins.Participate in DFT logic insertion like scan and BIST at Register-Transfer Level (RTL) and netlist level.Perform DFT checks for scan coverage and memory Built-In Self Test (BIST). Plan SoC/IP/Subsystems (SS) DFT and collaborate with cross-functional teams, DFT constraints development for timing closure and Physical Design (PD)/Static Timing Analysis (STA) support.Perform quality check flows like Lint, Clock Domain Crossing (CDC) of the DFT RTL in DFT modes. Participate in design debug, code review in coordination with other IPs Design Verification (DV) teams and Physical Design teams.

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .