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Senior Custom SOC IP Verification Engineer at NVIDIA — Bengaluru

Experience5+ yrs
SalaryNot disclosed
Work modeunknown
Levelmid
Posted25 Sept 2026

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About NVIDIA

NVIDIA is hiring in Bengaluru in semiconductors electronics. This role looks for around 5+ years of experience.

The role

A mid-level Senior Custom SOC/IP Verification Engineer role at a semiconductor manufacturing company, leading ASIC design verification for processing blocks in a SoC and building verification plans and coverage closure. You’ll use Synopsys VCS, Cadence Xcelium Simulator, Verdi, JasperGold, VC Formal, and work with mixed-language UVM and C++ testbenches, plus Perl or Python, AMBA protocols (AXI, ACE, CHI, ATB), and subsystems like ARM CPU, LPDDR, HBM, GPUs, DLA, PCIe, and Network on chip. Location is Bengaluru, Karnataka, India, with work mode not specified.

Full job description

NVIDIA needs a Senior Custom SOC/IP Verification Engineer for next-gen solutions. Seeking hard-working individuals to build life-changing custom SOCs. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of exceptional people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.

What You'll Be Doing

Lead ASIC design verification for various processing blocks in a SOC, including planning, execution, Coverage and methodology development.Collaborate with multiple teams (Architecture, SW/FW, Design, Modeling, Emulation, Post-Silicon Validation) to ensure comprehensive verification plans.Support engineering teams in delivering solutions for purpose-built ASICs and collaborate with IP development teams for IP identification, selection, and licensing.Analyze SOC and IP architecture, develop verification plans, and establish performance metrics.Work with partners in a co-development environment during development, debug, and bringup.Plan tests, achieve coverage closure, and enable customer TB infrastructure.Validate use cases for power-on and boot requirements.

What We Need To See

Proficient in design verification tools like Synopsys VCS, Cadence Xcelium Simulator, Verdi, JasperGold, and VC Formal.Consistent track record of first-pass success in ASIC Development.Holds a B.S. or M.S. degree in Computer Engineering or Electrical Engineering, with 5+ years of experience in ASIC, IP, or SoC design verification.Skilled in handling mixed language UVM and C++ testbenches, interpreting functional specs, and building comprehensive test plans.Experienced in developing tools and infrastructure using Perl or Python, with a strong background in AMBA protocols (AXI, ACE, CHI, ATB).Hands-on experience with subsystems in new technologies like ARM CPU, LPDDR, HBM, GPUs, DLA, PCIe, and Network on chip, including performance verification.

We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform crucial job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.

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