RTL Design (SOC) Engineer-Staff

Qualcomm · Bengaluru

  • Experience8–13 yrs
  • SalaryNot disclosed
  • Work modeonsite
  • Posted23 Sept 2026
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About Qualcomm

Qualcomm is hiring in Bengaluru in semiconductors electronics. This role looks for around 8+ years of experience.

Skills

  • SoC development
  • full-chip design
  • RTL design
  • design convergence
  • architecture
  • micro-architecture
  • Verification
  • Synthesis
  • timing closure
  • IP dependency management
  • front-end design
  • high-speed serial IO protocols
  • clock rate compensation FIFO
  • gearbox design
  • power gating
  • low power modes
  • bus protocols
  • AHB
  • AXI
  • PCIe
  • USB
  • Ethernet
  • test plan review
  • coverage metrics

The role

A design engineer at a semiconductor company develops SoC architectures through RTL design, bus protocols, and high-speed serial IO, while coordinating synthesis, verification, and timing closure. The role also applies low-power design and memory controller design to scalable computing platforms.

Full job description

Job Summary

You will be part of the CSG team focused on Data Center innovation through next-gen architectures for Dragonfly which is Qualcomm's rack-scale Agentic AI platform, reshaping compute efficiency and scalability for the AI era.

Requirements

Education: Bachelors or masters degree in Electrical or Electronics and Communication or Computer Science Engineering.

Experience: 8+ years of proven experience in SoC development, and full-chip design

Expertise:

Good understanding of the design convergence cycle, including architecture, micro-architecture, Verification, Synthesis and timing closure.

Expertise in managing IP dependencies, as well as planning front-end design tasks.

Design and development of high-speed serial IO protocols

Implementation of clock rate compensation FIFO, gearbox design for data width, bypass on controller, power gating, low power modes

Skills:

Excellent communication and interpersonal skills.

Minimum Qualifications

Bus Protocols Peripherals: Strong knowledge of bus protocols such as AHB, AXI, and peripherals like PCIe, USB, Ethernet, etc.

Memory Controllers Microprocessors: Experience with memory controller designs and microprocessors is an advantage.

Test Plans Verification: Proficient in reviewing high-level test plans and coverage metrics.