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Physical Design and Implementation Engineer, Silicon Engineering at Google — Bengaluru

Experience4–5 yrs
SalaryNot disclosed
Work modeonsite
Levelmid
Posted17 Sept 2026

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About Google

Google is hiring in Bengaluru in technology software. This role looks for around 4+ years of experience.

Skills

ASIC RTL2GDS implementation
GPU
Physical Design Verification
Static Timing Analysis
IR and EM signoff
power, performance, and area optimization

The role

A physical design engineer at a semiconductor technology company develops ASIC RTL2GDS implementation for GPU silicon, optimizing power, performance, and area through Static Timing Analysis and AI physical design tools. The role delivers block and full-chip implementation, signoff convergence, and high-performance compute designs.

Full job description

In most instances, this position requires in-person interviews as part of the hiring process.Minimum qualifications:

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.4 years of experience in physical design with two or more chip tape outs.

Preferred qualifications:

Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.Experience in power, performance and area optimization.Experience in high performance designs (CPUs, GPUs, DSPs or other compute etc.).

About The Job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

As a Physical Design Engineer in the GPU Implementation team, you will own block or subsystem implementation of complex logic blocks with special focus on optimizing Power, Performance and Area (PPA). You will be working closely with the RTL, DFT and Foundation IP teams to improve PPA, deploy AI workflows to improve productivity, time to market and PPA.

The Platforms and Devices team encompasses Google's various computing software platforms across environments (desktop, mobile, applications), as well as our first party devices and services that combine the best of Google AI, software, and hardware. Teams across this area research, design, and develop new technologies to make our user's interaction with computing faster and more seamless, building innovative experiences for our users around the world.

Responsibilities

Develop all aspects of ASIC RTL2GDS implementation for Graphics Processing Unit (GPU) for the Tensor SOC.Manage block and full-chip level physical implementation and Quality of Results (QoR) (power, timing, area).Signoff convergence inclusing Static Timing Analysis (STA), Physical Design Verification (PDV), IR and EM (Electo-Migration).Optimize power, performance and area to achieve performance and cost.Reduce time to market and improve PPA through deployment of Artifical Intelligence (AI) physical design tools and workflows.

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .