NPU/AI Processor Architecture (RTL) design- Staff/Sr Staff
Qualcomm · Bengaluru
- Experience6–11 yrs
- SalaryNot disclosed
- Work modeonsite
- Posted23 Sept 2026
About Qualcomm
Qualcomm is hiring in Bengaluru in semiconductors electronics. This role looks for around 6+ years of experience.
Skills
- RTL Design
- CPU/AI processor micro-architecture
- Computer Arithmetic
- Floating-Point design
- Matrix Multiply engines
- Vector Extensions
- Memory sub-systems
- Load/store
- Caches
- Atomics
- Coherence and consistency
- Branch prediction
- Out-of-order
- Dispatch
- Schedulers
- Multi-processor and multi-threaded systems
- RISC-V
- Power, performance and Area (PPA) optimizations
- CPU sub-system Logic Design
- Reliability, Availability, Serviceability (RAS)
- Power management architecture and design
- Functional safety (FUSA)
- System and Silicon Debug
The role
A hardware architecture engineer at a semiconductor product company designs AI processors through RTL Design and Computer Arithmetic, optimizing Power, performance and Area (PPA) optimizations and applying Functional safety (FUSA) and System and Silicon Debug.
Full job description
Job Summary
Qualcomm's Hexagon NPU Team is hiring for various positions in Bangalore (India) location for the development of high-performance, energy-efficient CPU and AI processors. Hexagon NPU is an in-house built Qualcomm proprietary processor which is the center of Qualcomm's hybrid AI computing capability targeted for broad spectrum of AI use cases across market segments.
We are seeking highly skilled engineers with over 5+ years of experience and a strong knowledge in CPU/AI processor micro-architecture, architecture, RTL design, debug architecture, RAS, power-management and circuit designers to join our team.
Join us to build IP blocks that power Snapdragon processors and AI inference engines.
Responsibilities
RTL Design of high-performance CPU/AI processors
RTL coding, micro-architecture and architecture
Computer Arithmetic
Floating-Point design
Matrix Multiply engines
Vector Extensions
Memory sub-systems, Load/store, caches, atomics, coherence and consistency
Branch prediction, out-of-order, dispatch, schedulers
Multi-processor and multi-threaded systems
RISC-V
Power, performance and Area (PPA) optimizations
CPU sub-system Logic Design
Reliability, Availability, Serviceability (RAS)
Power management architecture and design, circuits, flows and systems
Di/Dt, voltage-noise, peak-currents and thermal mitigation
Functional safety (FUSA)
System and Silicon Debug
Minimum Qualifications
Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience.
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience.
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.