Modem design/RTL (Sr Staff)

Qualcomm · Bengaluru

  • Experience10–15 yrs
  • SalaryNot disclosed
  • Work modeonsite
  • Posted23 Sept 2026
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About Qualcomm

Qualcomm is hiring in Bengaluru in semiconductors electronics. This role looks for around 10+ years of experience.

Skills

  • SystemVerilog
  • Verilog
  • VHDL
  • SoC design
  • RTL design
  • Microarchitecture
  • Logic design
  • ASIC design
  • AMBA protocols
  • AXI
  • AHB
  • APB
  • Multi-clock design

The role

A design engineer at a semiconductor electronics company develops modem hardware through SystemVerilog, Verilog and SoC design, shaping microarchitecture and RTL integration for wireless devices. The role applies VHDL and AMBA protocols to multi-clock designs and front-end ASIC flows.

Full job description

General Summary:

Roles and Responsibilities

Qualcomm modem team is looking for world-class RTL design engineers looking to work on cutting edge wireless technology, which will be deployed worldwide in our industry leading devices.

You will be contributing to and leading a team for RTL design and integration of one or more flagship modem core IPs. Responsibilities include:

Microarchitecture development and specification. From early high-level architectural exploration, through micro architectural research and arriving at a detailed specification.

RTL ownership. Development, assessment and refinement of RTL design to target power, performance, area and timing goals

Working collaboratively with block designers, verification, architecture, implementation, and post-silicon teams to resolve issues and ensure timely project execution.

Collaborating with cross-functional teams, debugging and identifying issues, providing workarounds, and making recommendations on bug fixes.

Leading and mentoring a team of engineers, providing technical guidance to the team

Leading overall project planning efforts and execution.

Skillset required

The candidate must have at least 10 years of front-end ASIC RTL design experience. The candidate must be strong in design micro-architecture and RTL coding (SystemVerilog / Verilog / VHDL).

Experience in Logic design /micro-architecture / RTL coding is a must .

Must have hands on experience with SoC design and integration for SoCs.

Experience in Verilog/System-Verilog is a must .

Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC.

Other requirements include:

Hands-on experience with multi-clock designs.

Exposure to synthesis and STA.

Awareness of low power and high-speed design.

Knowledge of industry-standard front-end tool flows (lint, CDC, etc.).

Strong critical thinking, problem-solving, and debugging skills.

Excellent leadership, communication and interpersonal skills. Flexible to work with multi-geo teams.

Ability to thrive in a fast-paced, dynamic environment and manage multiple priorities.

Minimum Qualifications:

Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience.

OR

Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience.

OR

PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.