Leader/Manager, ASIC Design Verification Engineer
Cisco · Bengaluru
- Experience13–18 yrs
- SalaryNot disclosed
- Work modeonsite
- Levelexecutive
- Posted18 Sept 2026
About Cisco
Cisco is hiring in Bengaluru in technology software. This role looks for around 13+ years of experience.
Skills
- ASIC design verification
- SystemVerilog
- UVM methodology
- C++
- scripting
- ASIC development
- SoC development
The role
A design verification engineer at a networking technology company develops ASIC and SoC products through specification, tape-out, and lab validation, applying SystemVerilog and UVM methodology. C++ and scripting support high-performance, high-volume hardware verification.
Full job description
You will have an ASIC design verification background with hands-on experience in System Verilog and UVM methodology with in-depth knowledge of C++,scripting as well as ASIC / SoC development cycle,the best industry practices,from specification through tape-out and lab validation,and a proven track record of success in high-performance / high-volume products.
Minimum Qualifications