DFT Timing Lead

Advanced Micro Devices (AMD) · Bengaluru

  • Experience8–15 yrs
  • SalaryNot disclosed
  • Work modeonsite
  • Posted23 Sept 2026
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About Advanced Micro Devices (AMD)

Advanced Micro Devices (AMD) is hiring in Bengaluru in semiconductors electronics. This role looks for around 8+ years of experience.

Skills

  • Static Timing Analysis
  • timing closure
  • RTL quality check tools
  • SpyGlass
  • Clock Domain Crossing
  • lint
  • DFT architecture
  • DFT constraints handling
  • test modes

The role

A DFT timing engineer at a semiconductor product company designs DFT architecture and manages Static Timing Analysis and timing closure for complex chips. The role applies RTL quality check tools and DFT constraints handling across block and top-level test modes.

Full job description

Preferred Experience

Exposure to Static timing analysis Timing closure is required.

Experience with RTL quality check tools / methodologies such as Spyglass,CDC,Lint is required.

Experience in DFT architecture for complex chips.

Proven experience in DFT constraints handling,Block and Top-level test mode Static timing analysis (STA).