DFT Engineer

MediaTek · Bengaluru

  • Experience6–7 yrs
  • SalaryNot disclosed
  • Work modeonsite
  • Levelsenior
  • Posted13 Sept 2026
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About MediaTek

MediaTek is hiring in Bengaluru in semiconductors electronics. This role looks for around 6+ years of experience.

Skills

  • Design for Test
  • TetraMAX
  • automatic test pattern generation
  • scan synthesis
  • static timing analysis
  • DFT verification
  • DFT debug
  • DFT clocking
  • DFT timing constraints
  • scan-chain analysis
  • scan stitching
  • DCT synthesis
  • DCG synthesis

The role

A design verification engineer at a semiconductor company performs Design for Test, automatic test pattern generation, scan synthesis, and static timing analysis for smartphone systems-on-chip, covering pre-silicon verification and post-silicon debug.

Full job description

Job Description

6+ years working experience on DFT and usage of tools like Tetramax SoC / Modem DFT for Smartphone ATPG Coverage analysis and improvements APTG/TFT pattern generation and optimization Co-work with Smartphone SOC team to plan SoC/Modem DFT requirements Handle pre-silicon DFT verification and post-silicon DFT debug DFT clocking and DFT timing constraints Doing scan synthesis and scan-chain analysis/stitching etc Doing DCT/DCG synthesis. Analyze DFT timings violations along with STA teams Work on the DFT methodologies for new technology nodes

Main Requirements and Qualifications

6+ years working experience on DFT and usage of tools like TetramaxSoC / Modem DFT for Smartphone ATPG Coverage analysis and improvementsAPTG/TFT pattern generation and optimizationCo-work with Smartphone SOC team to plan SoC/Modem DFT requirementsHandle pre-silicon DFT verification and post-silicon DFT debugDFT clocking and DFT timing constraintsDoing scan synthesis and scan-chain analysis/stitching etcDoing DCT/DCG synthesis.Analyze DFT timings violations along with STA teamsWork on the DFT methodologies for new technology nodes