DFT Engineer

Arm · Bengaluru

  • Experience2–5 yrs
  • SalaryNot disclosed
  • Work modeonsite
  • Levelmid
  • Posted21 Sept 2026
Apply for this job

About Arm

Arm is hiring in Bengaluru in semiconductors electronics. This role looks for around 2+ years of experience.

Skills

  • SystemVerilog
  • TCL
  • Verilog
  • DFT
  • DFT Design
  • Linux
  • JTAG
  • MBIST
  • Perl
  • UNIX
  • Scan compression
  • Memory BIST
  • Logic BIST
  • IJTAG
  • ATPG
  • Fault simulation
  • Static Timing Analysis
  • SoC architectures
  • Low power design
  • IEEE 1149
  • IEEE 1500
  • IEEE 1687
  • IEEE 1838
  • Siemens DFT tools
  • Cadence DFT tools
  • Synopsys DFT tools

The role

A design verification engineer at a semiconductor company develops DFT Design using Verilog, SystemVerilog and TCL for SoC test architectures, integrating scan compression, MBIST and JTAG. The work also applies ATPG and Static Timing Analysis to validate silicon diagnostics and low-power designs.

Full job description

Company: Arm

Key Skills: System Verilog, TCL, Verilog, DFT, DFT Design, Linux, JTAG, MBIST, Perl, UNIXRoles and Responsibilities: This role is for a DFT Engineer with proven ability of 2 to 5 years in Design for TestExperience coding Verilog RTL, TCL and/or PerlProficient in Unix/Linux environmentsCore DFT skills considered for this position should include some of the following: Scan compression and insertion, Memory BIST and repair scheme implementation, Logic BIST, JTAG/IJTAG, at-speed test, ATPG, fault simulation, back-annotated gate level verification, silicon debug, memory and scan diagnosticsBachelors or Master's degree or equivalent experience in Electronic Engineering, Computer Engineering, or a related fieldSkills Required:Familiarity with IEEE 1149, 1500, 1687, 1838Synthesis & Static Timing AnalysisFamiliarity with SoC style architectures including multi-clock domain and low power design practices.Validated understanding of Siemens DFT toolsFamiliarity with Arm IP like the following: Cortex CPUs, Mali GPUs, AMBA protocols, CoreLink interconnects, CoreSight debugExperience with 2.5D and 3D testAbility to work both collaboratively on a team and independentlyHard-working and excellent time management skills with an ability to multi-taskAn upbeat demeanor to working on exciting projects on the cutting edge of technologyExperience with Siemens, Cadence, and/or Synopsys DFT and simulation toolsEducation: Bachelor's Degree in Engineering