Asic Rtl Design Engineer
Qualcomm · Bengaluru
- Experience3–8 yrs
- SalaryNot disclosed
- Work modeonsite
- Posted23 Sept 2026
About Qualcomm
Qualcomm is hiring in Bengaluru in semiconductors electronics. This role looks for around 3+ years of experience.
Skills
- ASIC RTL design
- synthesis
- logical equivalence checking
- RTL and netlist CLP
- Cadence LEC
- SpyGlass Lint
- CDC checks
- AXI bus protocols
- AHB
- SPMI
- I2C
- SPI
- Perl
- Tcl
- Python
- post-silicon debug
The role
An ASIC RTL design engineer at a semiconductor electronics company designs and verifies RTL for ASICs using formal verification and AXI bus protocols, with synthesis and Python expertise.
Full job description
Minimum Qualifications
Preferred Qualifications . 3 to 8 years of strong experience in RTL design for ASICs.
Experience in Synthesis,Logical Equivalence checks,RTL and Netlist CLP. Cadence LEC formal verification. Spyglass Lint / CDC checks and waiver creation. AXI bus protocols (AHB,AXI,SPMI,I2C,SPI). Perl / TCL/Python language. Post-Si Debug