ASIC Engineer, Design Verification
Meta · Bengaluru
- Experience15+ yrs
- SalaryNot disclosed
- Work modeonsite
- Levelexecutive
- Posted1 Oct 2026
About Meta
Meta is hiring in Bengaluru in technology software. This role looks for around 15+ years of experience.
Skills
- ASIC
- SoC
- SystemVerilog UVM
- C/C++
- SystemVerilog Assertions
- Formal
- Emulation
- Python
- TCL
- Perl
- Shell
- EDA tools
The role
A design verification engineer at a social technology company develops ASIC and SoC verification environments for AI and data-center computing, applying SystemVerilog UVM and functional verification to validate complex hardware. Expertise includes SystemVerilog Assertions and EDA tools, with cross-functional collaboration across design, emulation, and silicon validation.
Full job description
The Infra Silicon team at Meta is responsible for designing and building in-house hardware accelerator Application-Specific Integrated Circuits (ASICs) to enhance Meta's computing with superior capacity and efficiency at lower power and cost. The team focuses on creating domain-specific System on Chips (SoCs) that enable Meta's data centers to execute computationally-intensive workloads, such as video transcoding and AI/ML, with higher performance and lower energy consumption. They are organized into several key areas, including architecture & algorithms, design & micro-architecture, design verification, implementation & backend design, emulation/prototyping, and system on chip (SoC), which collaborate extensively with other teams to deliver comprehensive solutions for various technical domains.
ASIC Engineer, Design Verification Responsibilities:
Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verificationDevelop functional tests based on verification test planDrive Design Verification to closure based on defined verification metrics on test plan, functional and code coverageDebug, root-cause and resolve functional failures in the design, partnering with the Design teamCollaborate with cross-functional teams like Design, Model, Emulation and Silicon validation teams towards ensuring the highest design qualityDevelop and drive continuous Design Verification improvements using the latest verification methodologies, tools and technologies from the industry
Minimum Qualifications:
Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experienceTrack record of 'first-pass success' in ASIC (Application-Specific Integrated Circuit) development cycles8+ years of hands-on experience in SystemVerilog/UVM (Universal Verification Methodology) and/or C/C++ based verification8+ years of experience in IP/sub-system and/or SoC (System on Chip) level verification based on SystemVerilog UVM and OVM (Open Verification Methodology) based methodologiesExperience in one or more of the following areas along with functional verification - System Verilog Assertions, Formal, EmulationExperience in EDA/Electronic Design Automation tools and scripting (Python, TCL, Perl, Shell) used to build tools and flows for verification environmentsExperience in architecting and implementing Design Verification infrastructure and executing the full verification cycle
Preferred Qualifications:
Experience in one or more of the following areas along with functional verification - SV Assertions, Formal, EmulationExperience with verification of ARM/RISC-V based sub-systems or SoCsExperience with simulators and waveform debugging toolsExperience in technically planning, executing and leading the verification of multiple complex Sub-Systems or SoC or from multi-chiplet Solutions from Architecture to Silicon15+ years of hands-on experience in development of UVM based verification environments from scratchExperience working across and building relationships with cross-functional design, model and emulation teamsExperience with IP or integration verification of high-speed interfaces like Ethernet, PCIe, DDR, HBMExperience in the Networking domain with in-depth experience working with AI Compute, High-Speed IO Interconnects, Die-to-Die Interconnects, Ethernet, 400G MAC, RDMA, RoCE, NIC, TSO, LRO, TimeSync protocolsExperience with development of fully automated flows and scripts for data exploration, analysis and performance verificationExperience with revision control systems like Mercurial(Hg), Git or SVN
About Meta:
Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today—beyond the constraints of screens, the limits of distance, and even the rules of physics.
Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.