AMS Design Verification Lead – Mixed-Signal SoC | GaN

Texas Instruments · Bengaluru

  • Experience3–8 yrs
  • SalaryNot disclosed
  • Work modeonsite
  • Posted26 Sept 2026

About Texas Instruments

Texas Instruments is hiring in Bengaluru in semiconductors electronics. This role looks for around 3+ years of experience.

Skills

  • mixed-signal design verification
  • SystemVerilog
  • UVM
  • VerilogAMS
  • mixed-signal testbenches
  • behavioral modeling
  • coverage-driven verification
  • analog-digital integration
  • simulation debug

The role

A design verification engineer at a semiconductor company develops mixed-signal design verification, SystemVerilog, and UVM for high-voltage power controller SoCs, using behavioral modeling and coverage-driven testbenches. The role also applies VerilogAMS and Cadence Spectre to debug simulations and validate analog-digital integration.

Full job description

⚡ Build Something Extraordinary — Lead AMS Verification for World-Class High Voltage Power ICs

At Texas Instruments, our High Voltage Power (HVP) team develops some of the world's most advanced power solutions — AC/DC controllers, isolated DC/DC converters, GaN-integrated power stages, and modules capable of withstanding several hundreds of volts. Now, we're building this capability in Bangalore — and we're looking for an exceptional AMS DV Engineer/Lead to be part of this exciting journey from the ground up.

🔎 About the Opportunity

This is a rare startup-like opportunity within the safety of TI's global umbrella. You won't just join a team — you'll help build one. As part of TI's new HVP investment in India, you'll work in a dynamic, entrepreneurial environment while having access to TI's world-class tools, processes, and expertise.We are looking for a talented AMS Design Verification Engineer/Lead to join the HVP team in Bangalore — responsible for developing and driving mixed-signal verification strategy, AMS testbenches, behavioral models, and SoC-level DV for high-voltage power controller ICs.

📌 Key Responsibilities

Develop detailed coverage-driven verification plans in close collaboration with System and Design teamsPerform behavioral modeling of analog blocks using SV RNM, VerilogAMS (wreal, electrical)Identify and develop system-level AMS tests to ensure bug-free siliconIndependently develop SV/UVM-based testbenches, tests, checkers, assertions, and enhance with randomization and coverageInnovate and drive new and improved design verification methodologies; collaborate with EDA teams to upgrade tools and flowsInteract with Test/Validation teams in post-silicon activities and customer debug/analysisMentor and lead junior DV engineers — drive smart team initiatives and knowledge sharingCollaborate closely with the DMS/SoC DV team for RTL verification support as neededMaintain strong interactions with Digital Design, Firmware, Analog Design, and Applications teams

🛠️ Minimum Requirements

Bachelor's/Master's degree in Electrical/Electronics Engineering3–8 years of experience in mixed-signal design verificationStrong fundamentals in mixed-signal designs — analog building blocks, digital design processes, top-level integrationProven experience in developing mixed-signal testbenches in SV/UVM from scratchStrong simulation debug capability — waveform analysis, schematic simulation debug, model debuggingAbility to own design deliverables and schedules independentlyStrong communication, interpersonal, and team collaboration skills

🌟 Preferred Qualifications

Hands-on expertise in SoC-AMS testbench developmentProficiency with Cadence Mixed-Signal Design Environment — Virtuoso, ADE Assembler, Xcelium, VIVA, SimVisionExpertise in Cadence Spectre simulation testbench development, regression flow, and debugExpertise in mixed-signal waveform review, debugging, and coverage analysisStrong HDL skills — SystemVerilog, UVM, VerilogAMSExperience in writing checkers, assertions, and monitors for top-level simulationsExpertise in automation using Python, Perl, TCL, or shell scriptingKnowledge of analog controllers for system testbench development and debugPrior experience as an AMS DV Lead for a project is a strong advantage

💡 Why Texas Instruments HVP Bangalore?

🚀 Startup Energy: Join a new team being built from scratch — your contributions shape the culture and capability🏆 Global Impact: Work on the world's largest HVP portfolio — AC/DC, DC/DC, GaN, and modules🤝 Leadership: Lead, mentor, and grow junior DV engineers in a high-ownership environment💰 Compensation: Competitive salary, comprehensive benefits & long-term incentives📚 Innovation: Access to cutting-edge EDA tools, TI's global DV methodology, and Cadence mixed-signal flows🔬 Technology: Work on GaN, high-voltage, and isolated power controller SoCs — one of the most demanding domains in semiconductors

📣 Ready to Lead AMS DV at TI's Newest HVP Team in Bangalore?

If you are passionate about mixed-signal verification, AMS testbench development, and the rare opportunity to build a team and technical capability from the ground up — we want to hear from you.

👉 Apply now